Transmitter and wireless communication apparatus using the transmitter

ABSTRACT

In a transmitter of polar-loop architecture having a phase control loop and an amplitude control loop, as loop filters for controlling a loop band of the amplitude control loop, a first filter with lag-lead characteristics (secondary or more filter including a capacitor and a resistor) and a second filter of a perfect integrator type (filter including only a capacitor) are employed, and current-output type circuits are connected to respective front stages of the first and second filters.

BACKGROUND OF THE INVENTION

The present invention relates to a technique for facilitating reductionin noise and a design of a loop filter relative to a transmitter whichhas a high frequency power amplifier and performs a control of an outputpower by a feedback control, and particularly to a technique effectivelyapplied to a transmitter having a phase control loop and a techniqueeffectively applied to an amplitude control loop for performing a phasemodulation and an amplitude modulation and a wireless communicationapparatus using this transmitter such as a mobile phone.

In a mobile phone, needs of a high-speed data communication in additionto a speech communication have been increased in recent years. In GSM(Global System for Mobile communications) that is one of European MobileCommunications Standards, on the basis of a conventional system using aGMSK (Gaussian Minimum Shift Keying) modulation architecture, GPRS(General Packet Radio Service) for speeding up a data communication hasbeen decided by allowing a plurality of time slot transmissions for onetime slot transmission in the GSM with multiplexing TDMA (Time DivisionMultiple Access) architecture. Further, in order to realize a data speedexceeding the GPRS, a standardization of EDGE (Enhanced Data for GSMEvolution) using 8-PSK as a modulation architecture has been made.

Since an amplitude of a GMSK modulated signal is constant, as atransmission architecture of a mobile phone for GSM, an offset PLLarchitecture for outputting a signal having a constant amplitude isgenerally used. Further, in the offset PLL architecture, since an inputamplitude is constant, as a power amplifier for amplifying a signal witha predetermined gain, a high efficient nonlinear power amplifier iswidely used. The operating principle of the transmitter of the offsetPLL architecture is described in, for example, IEEE journal ofsolid-state circuits, Vol. 32, No. 12, December 1997, “A 2. 7-V GSM RFtransceiver IC”, pp. 2089-2096.

On the other hand, since the amplitude of the modulated signal in the8-PSK modulation of the EDGE system is not constant, a lineartransmission capable of being transmitted without distortion of not onlyan input signal phase but also an amplitude is required for thetransmission architecture. As a way to realize the linear transmission,two architectures have been known. The first architecture is a mixerarchitecture for performing a frequency conversion by a mixer, where alinear power amplifier is employed. Details of the mixer architectureare described in, for example, “RF MICROELECTRONICS”, pp. 149-155 byBehard Razavi, PRENTICE HALL PTR Press. The second architecture is anarchitecture in which a nonlinear power amplifier is employed and adistortion compensation is applied thereto, and thereby a high efficientnonlinear power amplifier can be used. As examples of theabove-mentioned architecture, there are a polar-loop architecture, aCartesian-loop architecture, a Predistortion architecture, and the like.

In the EDGE system, nine modes of MSC1 to MSC9 are, however, prescribedaccording to an amount of transmission data, and the modes each have adifferent error correcting code architecture, and a mobile phone forEDGE has to be configured so as to be capable of operating in all themodes. The modes of MSC1 to MSC4 among the nine modes of MSC1 to MSC9relate to the GMSK modulation while the modes of MSC5 to MSC9 relate tothe 8-PSK modulation. In other words, the mobile phone for EDGE has tobe a mobile phone for dual mode capable of performing two modulations ofthe GMSK modulation and the 8-PSK modulation.

In order to realize the dual mode transmission, when the firstarchitecture using the above-mentioned mixer is applied to both the GMSKmodulation and the 8-PSK modulation, there is an advantage of reductionin area by sharing a circuit while there is a disadvantage of reductionin power efficiency because of use of the linear power amplifier. On theother hand, when the above-mentioned offset PLL architecture is employedfor the GMSK modulation and the first architecture is employed for the8-PSK modulation, there is an advantage of the case where high powerefficiency is obtained while there is a disadvantage of the case wherean area increases because a circuit such as a power amplifier or thelike cannot be used in common therewith.

Therefore, the second architecture capable of using the nonlinear poweramplifier is preferable in that the power efficiency is improved whilethe polar-loop architecture in the second architecture is particularlyadvantageous in that many circuits can be used in common with the offsetPLL architecture.

FIG. 7 is a diagram showing a conventional example of a transmitter forpolar-loop architecture. The above-mentioned transmitter has a phaseloop and an amplitude loop.

The amplitude loop is configured with a nonlinear power amplifier 200having an I/O terminal and an amplitude control terminal; signalbranching means 201 for branching an output signal of the nonlinearpower amplifier 200 into a first and second outputs; an attenuator 102for attenuating the signal branched by the signal branching means 201; amixer 103 to which the signal attenuated in the attenuator 102 issupplied; a voltage-controlled oscillator (VCO) 104 generating a localsignal for causing the mixer 103 to perform a frequency conversionoperation; a filter 105 for suppressing undesired harmonics included inthe output of the mixer 103; an amplitude detector 130 for detecting anamplitude difference between a feedback signal FB and a referencemodulated signal (MOD); and a low pass filter 111.

A signal (OUT) being output from the nonlinear power amplifier 200 ofthe above-mentioned transmitter is output to an antenna (not shown) viathe signal branching means 201. An output signal of the low pass filter111 is supplied to the amplitude control terminal of the nonlinear poweramplifier 200 as an output control signal VAPC, and an output amplitudeof the nonlinear power amplifier 200 is controlled such that theamplitudes of the feedback signal FB and the reference modulated signal(MOD) become equal. Further, an output signal (carrier) φTX of thetransmission oscillator (VCO) 114 is input into the input terminal ofthe nonlinear power amplifier 200. The amplitude of the signal (carrier)φTX supplied to the input terminal of the nonlinear power amplifier 200is constant.

FIG. 8 shows characteristics of the output amplitude to the outputcontrol signal VAPC of the nonlinear power amplifier 200 shown in thepolar-loop architecture in FIG. 7. A linear area shown in FIG. 8 is usedas an operating area of the nonlinear power amplifier 200. Since thefilter 105 is directed for suppressing the undesired harmonics includedin the output of the mixer 103 and is designed such that a band thereofis generally wider than a loop band of the above-mentioned amplitudeloop, the band and a phase margin of the amplitude loop is determinedaccording to the characteristics of the low pass filter 111.

On the other hand, the phase loop in the polar-loop architecture shownin FIG. 7 is configured with the nonlinear power amplifier 200; thesignal branching means 201; the attenuator 102; the mixer 103; the localVCO 104; the filter 105; a phase detector 140 for detecting a phasedifference between the feedback signal FB and the reference modulatedsignal (MOD); the low pass filter 113; and the transmission oscillator(VCO) 114, wherein the oscillation operation of the transmissionoscillator (VCO) 114 is controlled such that the phases of the feedbacksignal FB and the reference modulated signal (MOD) are coincided witheach other.

As described above, separate control loops are provided for an amplitudecomponent and a phase component of the reference modulated signal (MOD)so that while a modulation spectrum of the reference modulated signalMOD is stored in the output OUT, a center frequency thereof is convertedinto a desired frequency. The control of the desired frequency describedabove is performed by setting a frequency of the local VCO 104. Notethat details of the operating principle of the polar-loop architectureis described in, for example, “HIGH-LINEARITY RF AMPLIFIER DESIGN”, pp.161-164 by PETER B. KENINGTON, Artech House Press.

In the amplitude loop of the transmitter for polar-loop architecture, inorder to compensate for a distortion component generated in thenonlinear power amplifier 200, it is, however, necessary that an openloop transfer function Ho of the above-mentioned amplitude loop has asufficiently large gain in a low frequency area. Therefore, the designis generally made such that a transfer function F of the low pass filter111 has a pole (DC pole) at 0 Hz. General design formulas of thetransfer function F in the case of one pole (Type I) and of the transferfunction F in the case of two poles (Type II) are expressed in formula 1and formula 2, respectively. In the formulas, each of A and B isconstant.

$\quad\begin{matrix}{F = \frac{A}{S}} & \left( {{Formula}\mspace{14mu} 1} \right) \\{F = \frac{B \cdot \left( {s + w_{z}} \right)}{s^{2} \cdot \left( {s + w_{p}} \right)}} & \left( {{Formula}\mspace{14mu} 2} \right)\end{matrix}$

Formula 1 is a transfer function having one perfect integrator, in whichthe amplitude loop having the transfer function is stable because aphase thereof is not shifted 90 degrees or more. On the other hand, thefilter expressed with formula 2 is configured with one perfectintegrator and a secondary passive filter having lag-leadcharacteristics, in which the gain in the low frequency is increased andthe phase margin is increased. The frequency characteristic of each openloop transfer function Ho of Type I and Type II at a loop band of 1.8MHz is shown in FIG. 9. The zero point and the poles in Type II arearranged symmetrically with respect to respective loop bands, and thephase margin is designed to be 68 degrees. Generally, the phase marginis designed to be 45 degrees or more.

As can be seen from FIG. 9, since the gain in the low frequency area islarger in Type II than in Type I, Type II is more advantageous than TypeI in that distortion is reduced and the modulated precision is improved.Further, the gain in a frequency having a higher loop band than the loopband (of 1.8 MHz or more) is lower in Type II than in Type I, whichmeans that the suppression degree of noise generated in theabove-mentioned amplitude loop is large, and so Type II is moreadvantageous for a mobile phone which requires low noisecharacteristics. Therefore, in the transmitter for polar-looparchitecture, it is more advantageous that the low pass filter 111 onthe amplitude loop is designed with Type II due to the distortioncompensation and the noise suppression.

SUMMARY OF THE INVENTION

However, when the filter having the transfer function like formula 2 isdesigned, an active filter using an operational amplifier is generallyemployed in many cases. However, if the active filter including theoperational amplifier is used for the low pass filter 111 on theamplitude loop of the transmitter for polar-loop architecture, theoperational amplifier itself has a zero point and poles so that it isnecessary to consider the zero point and the poles in designing the lowpass filter 111. Therefore, there arises a problem that the designbecomes complicated.

An object of the present invention is to provide a technique capable ofsimplifying a design of a low pass filter on an amplitude loop in atransmitter for polar-loop architecture.

Further, another object of the present invention is to optimize aconfiguration of the low pass filter on the amplitude loop in thetransmitter for polar-loop architecture such that a transmission outputnoise can be reduced.

The above and other objects and novel features of the present inventionwill be apparent from the description and the accompanying drawingsthereof.

In order to achieve a first object, the present invention describedabove provides a transmitter of polar-loop architecture having a phasecontrol loop and an amplitude control loop, wherein, as loop filters forrestricting a loop band of the amplitude control loop, a first filterwith lag-lead characteristics (secondary or more filter including acapacitor and a resistor) and a second filter of a perfect integratortype (filter including only a capacitor) are employed, and whereincurrent-output type circuits are connected to respective front stages ofthe first filter and the second filter. By doing so, the first filterand the second filter can be configured by a passive filter comprisingpassive elements, so that an active filter including an operationalamplifier is not required, which enables to simplify the design thereof.

In order to achieve the second object, the above-mentioned presentinvention provides a transmitter of polar-loop architecture having aphase control loop and an amplitude control loop, wherein, as loopfilters for restricting a loop band of the amplitude control loop, afirst filter with lag-lead characteristics and a second filter of aperfect integrator type are employed, and wherein the first filter isprovided at a front stage thereof prior to the second filter. By doingso, a suppression degree relative to noise of the amplitude loop can beimproved and thereby a transmitter with low noise can be realized.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing an embodiment of a transmitteraccording to the present invention.

FIG. 2 is a block diagram showing a noise analysis model of thetransmitter according to the present invention.

FIG. 3 is a frequency characteristic diagram showing characteristics ofa first filter and a second filter in the form of comparison.

FIG. 4 is a block diagram showing another embodiment of the transmitteraccording to the present invention.

FIG. 5 is a block diagram showing still another embodiment of thetransmitter according to the present invention.

FIG. 6 is a block diagram showing an example of a wireless communicationapparatus using the transmitter according to the present invention.

FIG. 7 is a block diagram showing a basic configuration of a transmitterfor polar-loop architecture.

FIG. 8 is a control voltage-output characteristic diagram showing therelationship between an output control voltage VAPC being input into anamplitude control terminal of a nonlinear power amplifier and an outputsignal level.

FIG. 9 is a frequency characteristic diagram showing the characteristicsof a Type-I filter and a Type-II filter in the form of comparison.

FIG. 10 is a circuit diagram showing a specific example of an amplitudedetector used in the embodiments according to the present invention.

FIG. 11 is a circuit diagram showing a specific example of an automaticgain controlled amplifier and a current-output type buffer used in theembodiments according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, embodiments according to the present invention will bedescribed with reference to the drawings.

FIG. 1 is a configuration diagram showing a first embodiment of atransmitter according to the present invention.

The transmitter according to the present embodiment employs a polar-looparchitecture described in “BACKGROUND OF THE INVENTION”, and has a phaseloop and an amplitude loop and is configured as a transmitter for EDGE.

In FIG. 1, numeral 100 denotes a high frequency IC for performing aphase modulation and an amplitude modulation; PA-MDL denotes a powermodule which includes a nonlinear power amplifier 200 (hereinafter,referred to as a power amplifier) for amplifying and outputting atransmission signal or includes output detecting means 201 such as acoupler or a signal branching device of the like for detecting atransmission output; numeral 300 denotes a base band circuit forgenerating I/Q signals (base band signals) on the basis of transmissiondata, or for generating a control signal of the high frequency IC 100 ora bias voltage VBIAS for the power amplifier 200 in the power modulePA-MDL; numeral 220 denotes a transmission oscillator for generating aphase modulated transmission signal (carrier); and numeral 219 denotes afilter for restricting a band of a phase control loop and for giving acontrol voltage of the transmission oscillator 220.

Though not particularly limited, the high frequency IC 100 and the baseband circuit 300 are configured as a semiconductor integrated circuit ona single semiconductor chip, respectively. The transmitter according tothe present embodiment comprises two control loops of a feedback loop(amplitude loop) for an amplitude control as well as a feedback loop(phase loop) for a phase control. Further, in the present embodiment, afeedback path of the amplitude loop can be also used as a feedback pathof the phase loop.

The power module PA-MDL comprises the power amplifier 200, a voltagecontrol circuit for generating a drive voltage (Vdd) of theabove-mentioned power amplifier 200, the output detecting means 201, andthe like. The power amplifier 200 is configured with a FET or the like.The drive voltage (Vdd) corresponding to a control voltage VAPC suppliedfrom the amplitude loop of the above-mentioned high frequency IC 100, bythe voltage control circuit provided in the power module PA-MDL, isgenerated and applied to a drain terminal or a source terminal of thisFET. Further, an appropriate bias voltage VBIAS generated in a biascircuit (not shown) is applied to a gate terminal of the power FET(200). The output detecting means 201 is configured by signal branchingmeans comprising a coupler formed on a module substrate, or a capacitorfor branching and propagating only an alternating component of anoutput, or the like.

The high frequency IC 100 is configured by a phase frequency divider 110for generating signals whose phases are shifted 90 degrees with respectto each other, from an oscillation signal φIF of an intermediatefrequency generated in an oscillator IF-VCO; a quadrature modulator 120for mixing an I and Q signals supplied from the base band LSI 300 andthe frequency-divided signals in the phase frequency divider 110 toperform a quadrature modulation; a phase detector 240 for detecting thephase difference between a feedback signal from the above-mentionedfeedback path and an output signal (modulated signal) of the quadraturemodulator 120; an attenuator 202 for attenuating a detection signal ofthe output detecting means 201 for detecting an output level of thepower amplifier 200; a mixer 203 for mixing and frequency-converting(down-converting) an attenuated signal and an oscillation signal φRFfrom a high frequency oscillator 204; a filter 205 for suppressingundesired harmonics in the output of the above-mentioned mixer 203; anautomatic gain controlled amplifier (AGC) 206 for amplifying a signalpassed through the filter 205; a filter 207 for suppressing undesiredharmonics in the output of the automatic gain controlled amplifier 206;an amplitude detector 230 for detecting the amplitude difference betweenan output signal of the filter 207 and a reference signal from thequadrature modulator 120; a first low pass filter 213 for converting anoutput current of the amplitude detector 230 to a voltage; an automaticgain controlled amplifier 214 for amplifying an output voltage of thelow pass filter 213; a current-output type buffer 215 connected to theautomatic gain controlled amplifier 214; a second low pass filter 216for converting an output current of the current-output type buffer 215to a voltage; and a buffer 217 for generating and supplying the outputvoltage VAPC relative to the power amplifier 200 according to the outputof the second low pass filter 216.

Further, the high frequency IC 100 according to this embodiment isprovided with a register 170 for setting control information oroperating modes or the like inside a chip supplied from the base bandcircuit 300, a sequencer 180 for outputting a timing signal for eachcircuit inside the chip on the basis of a setting value of the register170 to operate in a predetermined order according to the operating mode,and the like.

In this embodiment, the amplitude loop is configured by the outputdetecting means 201, the attenuator 202, the mixer 203, the filter 205,the automatic gain controlled amplifier 206, the filter 207, theamplitude detector 230, the filter 213, the automatic gain controlledamplifier 214, the buffer 215, the filter 216, the buffer 217, and thepower amplifier 200. The filters 205 and 207 on the amplitude loop areused for the suppression of undesired harmonics in the respectiveoutputs of the mixer 203 and the automatic gain controlled amplifier206, and the band thereof is designed to be wider than a loop band ofthe above-mentioned amplitude loop, so that the band and a phase marginof the above-mentioned amplitude loop are determined by the low passfilters 213 and 216. Further, the phase loop is configured by the outputdetecting means 201, the attenuator 202, the mixer 203, the filter 205,the automatic gain controlled amplifier 206, the filter 207, the phasedetector 240, the filter 219, the transmission oscillator 220, and thepower amplifier 200.

In the phase loop, if the phase difference is generated between amodulated signal MOD of the quadrature modulator 120 and the feedbacksignal from the filter 207, then a voltage for reducing this differenceis supplied to a frequency control terminal of the transmissionoscillator 220 and the phase of the feedback signal from the filter 207is controlled to coincide with the phase of the output signal of thequadrature modulator 120. This phase loop controls the transmissionoscillator 220 such that the phase of the output thereof is not shiftedrelative to a supply voltage variation or temperature change. Note thatan output amplitude of the transmission oscillator 220 is kept constant.

In the present embodiment, a low pass filter 111 in the polar-looparchitecture shown in FIG. 7 is configured by two low pass filters 213and 216 as shown in FIG. 1. At the same time, in order to realizeformula 2, the filter 213 is configured by a secondary passive filterhaving lag-lead characteristics comprising two capacitors C2 and C3 anda resistor R3 connected in series to the capacitor C3, and the filter216 is configured by a perfect integrator type passive filter comprisingonly a capacitor C1. Further, in order that the respective low passfilters 213 and 216 can be configured only by passive elements (resistorand capacitor) and an operational amplifier is not required, the frontstage circuits of the respective filters are the current-output typecircuits, that is, the current-output type amplitude detector 230 andthe current-output type buffer 215.

Further, since it is necessary to configure an ideal integrator becauseof the realization of formula 2, the buffer amplifiers (thecurrent-output type buffer 215 and the buffer 217) are connected to thefront stage and a rear stage of the filter 216. As shown in FIG. 1,instead of connecting the filter 216 to the output of the current-outputtype buffer 215 and connecting the filter 213 to the output of theamplitude detector 230, even when the respective filters are reversed,that is, even when the filter 213 with lag-lead characteristics isconnected to the output of the current-output type buffer 215 and thefilter 216 is connected to the output of the amplitude detector 230,formula 2 can be realized. However, with respect to an optimization ofnoise characteristics of the amplitude loop, a filter arrangement shownin FIG. 1 is optimal and details thereof will be described later.

In the polar-loop architecture, since better match obtained at the timewhen the band of the phase loop is made to be identical to the band ofthe amplitude loop, in the transmitter according to the presentembodiment, the loop filter 219 on the phase loop is configured by thesecondary passive filter having lag-lead characteristics comprising twocapacitors and one resistor similarly to the filter 213 on the amplitudeloop, wherein a constant is set such that the band of the phase loop isrestricted to a band identical to the band of the amplitude loop, forexample, is as large as 1.8 MHz. However, since the gain of each circuiton the phase loop is different from the gain of each circuit on theamplitude loop, the values of the capacitors and resister of the filter219 are different from those of the filter 213. Further, in the phaseloop, since the oscillator 220 itself has characteristics functioning asthe perfect integrator, a filter corresponding to the second filter 216in the amplitude loop is not required and therefore such a filter is notprovided.

The amplitude detector 230 is configured by, for example, as shown inFIG. 2, a first amplitude detector and a second amplitude detector, andsubtracting means 212 for outputting the differential current betweenthe output signal of the first amplitude detector and that of the secondamplitude detector. The first amplitude detector comprises a limiter 208for converting a sine waveform of an input signal to a square waveformand outputting the input signal, and a current-output type mixer 209 forhandling the input and the output of the limiter 208, that is, forinputting the sine waveform signal before conversion and the squarewaveform after conversion, and detects the amplitude of the feedbacksignal passing through the filter 207. The second amplitude detectorcomprises a limiter 210 for inputting the modulated signal MOD as thereference signal being output from the modulator 120, and thecurrent-output type mixer 211, and detects the amplitude of thereference modulated signal MOD.

FIG. 10 shows a more specific circuit example of the amplitude detector230. The current-output type mixers 209 and 211 are each configured byone kind of multiplier. In each rear stage of the multipliers isprovided a current mirror circuit and the subtracting means 212 foroutputting, to a current output terminal OUT, a current IOUT1 inproportion to the amplitude difference between the reference modulatedsignal MOD and the feedback signal FB by subtracting a current of thecurrent mirror of the current mirror circuit. The mixer 211 isconfigured by differential pair transistors Q1 and Q2 for each receivingthe differential reference modulated signal MOD at the base thereof;resistors R4, R5 and R6 connected to the emitters of Q1 and Q2;differential pair transistors Q3 and Q4 whose common emitter isconnected to a collector of the differential pair transistor Q1 andwhich receives the differential output of the limiter 210 at the basethereof; differential pair transistors Q5 and Q6 whose common emitter isconnected to a collector of the differential pair transistor Q2 andwhich receives the differential output of the limiter 210 at the basethereof; a transistor Q7 connected between a collector of thedifferential pair transistor Q3 and a supply voltage Vcc; and atransistor Q8 connected between a collector of the differential pairtransistor Q6 and the supply voltage Vcc. The mixer 209 has the samecircuit configuration as the mixer 211, wherein the feedback signal FBfrom the amplitude loop is input as an input signal.

The subtracting means 212 is configured by transistors Q11 and Q12connected to the transistors Q7 and Q8 of the mixer 211 in a currentmirror manner; transistors Q13 and Q14 connected in series to thetransistors Q11 and Q12 and connected to each other in a current mirrormanner; and transistors Q15 and Q16 connected to the transistors Q7′ andQ8′ of the mixer 209 in a current mirror manner, wherein the transistorQ15 is connected in series to the current mirror transistor Q14 and thetransistor Q16 is connected in series to the current mirror transistorQ13.

With such a configuration, the current of the transistor Q7 in the sideof the mixer 211 is copied into the transistor Q11 in a current mirrormanner, and the current of the transistor Q8′ in the side of the mixer209 is copied into the transistor Q16 in a current mirror manner, andthe current added after copy is made to flow through the transistor Q13,and the added current flowing therethrough is copied into the transistorQ14 in a current mirror manner. Further, the current of the transistorQ8 is copied into the transistor Q12 in a current mirror manner, and thecurrent of the transistor Q7′ is copied into the transistor Q15 in acurrent mirror manner, and the current copied into the transistor Q 15is added to the current copied into the transistor Q12, and the currentof the above-mentioned current mirror transistor Q14 is subtracted fromthis added current so that the current I_(OUT1) in proportion to theamplitude difference between the reference modulated signal MOD and thefeedback signal FB is output to the current output terminal OUT.

FIG. 11 shows a specific circuit example of the automatic gaincontrolled amplifier 214 and the current-output type buffer 215. Theautomatic gain controlled amplifier 214 is configured by inputdifferential transistors Q21 and Q22, a variable current source VCconnected to a common emitter of the transistors Q21 and Q22, and loadtransistors Q23 and Q24 connected to the collectors of the transistorsQ21 and Q22. The current-output type buffer 215 is configured bytransistors Q31 and Q32 connected to the transistors Q23 and Q24 in acurrent mirror manner, a transistor Q33 connected in series to thetransistor Q31, and a transistor Q34 connected in series to thetransistor Q32 and connected to the transistor Q33 in a current mirrormanner, wherein a current I_(OUT2) obtained by subtracting the currentof the transistor Q34 from the current of the transistor Q32 is output.Thereby, the current corresponding to the potential difference betweenthe differential inputs of the automatic gain controlled amplifier 214is output from the current-output type buffer 215. The output voltage ofthe filter 213 is input into one of the differential inputs of theautomatic gain controlled amplifier 214, and a voltage Vref1 serving asa reference voltage such as 0.1 V is applied to the other of thedifferential inputs.

Note that the entire circuit shown in FIG. 11 can be regarded as thecurrent-output type automatic gain controlled amplifier 214, in thatcase the current-output type buffer 215 is not required. Further, theautomatic gain controlled amplifier 206 on the feedback path in thepolar-loop architecture according to the embodiment may be a circuit inwhich the load transistors of the automatic gain controlled amplifier214 shown in FIG. 11 are replaced with resistors. When the automaticgain controlled amplifier 214 (206) is configured by the circuit asshown in FIG. 11, a bias current IEE thereof is exponentially changed sothat the gain of the automatic gain controlled amplifier 214 (206),expressed in dB, relative to the control voltage VRAMP can be controlledto linearly change.

Next, as an example of an applied system of the transmitter according tothe present embodiment, an operation of an EDGE mode in a frequency bandof GSM900 will be described. In the following description, a unitdesignating a gain will employ not dB but true value.

The transmission frequency band for GSM900 is within the range from 880MHz to 915 MHz, and the output OUT of the power amplifier 200 is asignal obtained by 8-PSK modulating a carrier having a frequency withinthe transmission band. In the transmitter according to the embodiment,the modulated signal MOD being output from the quadrature modulator 120is a 8-PSK modulated signal, and the intermediate frequency thereof canbe arbitrarily selected but, in this case, the intermediate frequency isset at 80 MHz. When the amplitude loop and the phase loop of theabove-mentioned transmitter converges and comes to the stationarystates, the output signal of the filter 207 becomes a replica signalidentical to the modulated signal MOD. In other words, it is a signalobtained by being 8-PSK modulated having a carrier frequency of 80 MHz.

On the other hand, since the output signal of the filter 207 is a signalin which the output OUT of the power amplifier 200 is frequencyconverted in the mixer 203, the output frequency of a local VCO 204 is afrequency obtained by adding 80 MHz to the output frequency of the poweramplifier 200, that is, a frequency of 960 MHz to 995 MHz. As theoscillation frequency of the local VCO 204, a frequency obtained bysubtracting 80 MHz from the output frequency of the power amplifier 200,that is, a frequency of 800 MHz to 835 MHz may be, however, employed.Further, a frequency divider or a multiplier can be inserted between thelocal VCO 204 and the mixer 203 to operate the local VCO 204 with higherfrequency or lower frequency. The transmission VCO 220 is operated bycentering the output frequency of the power amplifier 200 and followingthe phase signal of the modulated signal MOD, and the output signalthereof is input into the nonlinear power amplifier 200.

In a system for GSM or EDGE, it is required that an antenna output powerin transmitting is controlled within a prescribed range. For example, ina terminal for a power class E2, the output power has to be controlledwithin the range of +5 dBm to +27 dBm per 2 dB step. Therefore, also inthe transmitter, it is necessary to correspond to the prescription ofthe output power control described above. In order to achieve this, theautomatic gain controlled amplifier 206 is inserted in the amplitudeloop. Hereinafter, the reason why the output power of the poweramplifier 200 can be controlled by the automatic gain controlledamplifier 206 will be described.

When the signal amplitude of the modulated signal MOD is designated asVMOD[V] and the stationary error of the amplitude loop is too small notto be ignored, the output signal amplitude of the filter 207 alsobecomes VMOD. Therefore, when the gain of the automatic gain controlledamplifier 206, the gain of the mixer 203, and the gain of the attenuator202 are designated as AAGC1, AMIX, and AATT, respectively, and if it isassumed that the attenuation of the signals by the filters 205 and 207and the signal branching means 201 is not made, then the signalamplitude VOUT[V] of the output OUT of the power amplifier 200 can beexpressed as formula 3.V _(OUT) =V _(MOD)/(A _(ATT) ·A _(MIX) ·A _(AGC1))  (Formula 3)

From formula 3, it is found that, by controlling the gain AAGC1 of theautomatic gain controlled amplifier 206, the output amplitude VOUT ofthe power amplifier 200 can be controlled to be a desired value.

Next, as described above, description will be made of problems arisingin the case where the output amplitude VOUT of the power amplifier 200is changed by controlling the gain AAGC1 of the automatic gaincontrolled amplifier 206, and description will be made of solutions forfixing the problems. The amplitude detectors 209 and 210 have the samecharacteristics, and the gain thereof is designated as ADET. Further, isthe gain of the subtracting means 212 is designated as “1” and atransfer function of the filter 213 is designated as F1 and the gains ofthe automatic gain controlled amplifier 214 and the current-output typebuffer 215 are designated as AAGC2 and ABUF1, respectively and thetransfer function of the filter 216 is designated as F2 and the gain ofthe buffer 217 and the gain from the amplitude control terminal of thepower amplifier 200 to the output thereof are designated as ABUF2 andAPA, respectively, then an open loop transfer function Ho of theabove-mentioned amplitude loop is expressed as formula 4.H _(o) =A _(ATT) ·A _(MIX) ·A _(AGC1) ·A _(DET) ·F ₁ ·A _(AGC2) ·A_(BUF1) ·F ₂ ·A _(BUF2) ·A _(PA)  (Formula 4)

The characteristics such as the loop band, the phase margin, and thelike of the amplitude loop can be determined by the open loop transferfunction Ho. Therefore, it is preferable that the transfer function Hois kept constant irrespective of the signal amplitude of the output OUTof the power amplifier 200, but it is found from formula 4 that if thegain AAGC1 is changed in order to control the signal amplitude of theoutput OUT of the power amplifier 200, then the transfer function Ho isalso changed. This is a problem arising from the AAGC1 control. In orderto solve the problem, in the transmitter according to the presentembodiment, the automatic gain controlled amplifier 214 is inserted on aforward path of the amplitude loop so that a product of the respectivegains of the automatic gain controlled amplifier 206 and the automaticgain controlled amplifier 214, that is, AAGC1×AAGC2 is controlled tobecome always constant. If AAGC1×AAGC2 is kept constant, as can be seenfrom formula 4, then the characteristics of the transfer function Ho canbe kept. constant even if the AAGC1 is changed. This is necessary inorder to keep the amplitude loop bandwidth always constant.

Next, an arrangement of the filters 213 and 216 and the noisecharacteristics of the amplitude loop in the transmitter according tothe embodiment will be described. As a noise calculation model of theamplitude loop, a linear model shown in FIG. 2 is employed. In order tosimplify the calculation, influences due to the filter 205 and 207 andthe signal branching means 201 will be ignored.

A noise N1[V] designates a sum of an output conversion noise of theattenuator 202 and an input-referred noise of the mixer 203; a noiseN2[V] designates a sum of the output-referred noise of the automaticgain controlled amplifier 206 and the input-referred noise of the firstamplitude detector (208, 209); a noise N3[V] designates a sum of theinput-referred noise of the second amplitude detector (210, 211) and anoise from the front stage circuit of the second amplitude detector; anoise N4[V] designates a sum of the output-referred noise of theautomatic gain controlled amplifier 214 and the input-referred noise ofthe current-output type buffer 215; and a noise N5[V] designates a sumof the output-referred noise of the buffer 217 and an amplitude controlterminal referred noise of the power amplifier 200, respectively. Theentire output noises of the amplitude loop are obtained by multiplyingthe noises N1 to N5 by the respective closed loop transfer functions tothe amplitude loop output. Now, if it is assumed that the respectiveclosed loop transfer functions relative to the noises N1 to N5 aredesignated as HN1 to HN5, then these can be expressed as formula 5 toformula 9.

$\quad\begin{matrix}{H_{N1} = \frac{A_{MIX} \cdot A_{AGC1} \cdot A_{DET} \cdot F_{1} \cdot A_{AGC2} \cdot A_{BUF1} \cdot F_{2} \cdot A_{BUF2} \cdot A_{PA}}{1 + H_{0}}} & \left( {{Formula}\mspace{20mu} 5} \right) \\{H_{N2} = \frac{A_{DET} \cdot F_{1} \cdot A_{AGC2} \cdot A_{BUF1} \cdot F_{2} \cdot A_{BUF2} \cdot A_{PA}}{1 + H_{0}}} & \left( {{Formula}\mspace{20mu} 6} \right) \\{H_{N3} = \frac{A_{DET} \cdot F_{1} \cdot A_{AGC2} \cdot A_{BUF} \cdot F_{2} \cdot A_{BUF2} \cdot A_{PA}}{1 + H_{0}}} & \left( {{Formula}\mspace{20mu} 7} \right) \\{H_{N4} = \frac{A_{AGC2} \cdot A_{BUF1} \cdot F_{2} \cdot A_{BUF2} \cdot A_{PA}}{1 + H_{0}}} & \left( {{Formula}\mspace{20mu} 8} \right) \\{H_{N5} = \frac{A_{PA}}{1 + H_{0}}} & \left( {{Formula}\mspace{20mu} 9} \right)\end{matrix}$

By using formula 5 to formula 9, there will be considered twopossibilities of the arrangement of the filters 213 and 216, that is,the case (arrangement 1) where the filter 213 and the filter 216 arearranged as shown in FIG. 1 and the case where the filter 213 and 216are replaced with each other in position, namely, the case (arrangement2) where the filter 216 is arranged at the position of the filter 213 inFIG. 1 and the filter 213 is arranged at the position of the filter 216.

Formula 5 to formula 9 correspond to the closed loop transfer functionsin the case of the arrangement 1. In the case of the arrangement 2,relative to formula 5 to formula 9, F1 and F2 are replaced with eachother, that is, F2 is substituted in place of F1 and F1 is substitutedin place of F2. as can be seen from formula 4, since one each of F1 andF2 is included in the transfer function Ho, change in characteristicsthereof does not occur even if F1 and F2 are exchanged. From the similarreason, with respect to the transfer functions HN1, HN2, HN3, and HN5,even if F1 and F2 are exchanged, the change in characteristics thereofdoes not occur. However, with respect to the transfer function HN4,since only one F2 is included in the numerator and F1 is not includedtherein, change in characteristics thereof occurs if F1 and F2 areexchanged. In order to suppress the noise, it is advantageous that thegain of the closed loop transfer function is smaller. Therefore, it isfound that, when one having a smaller gain out of F1 and F2 is includedin the numerator of the transfer function HN4, the output noise of thetransmitter can be made smaller.

Here, which gain of F1 and F2 is smaller will be considered. In aninitial stage where the amplitude loop is converging from thenon-stationary state to the stationary state, the current-output typebuffer 215 and the subtracting means 212 supply the maximum outputcurrents thereof to the respective filters 216 and 213, and stopsupplying the maximum output currents when an input potential of thebuffer 217 and the input potential of the automatic gain controlledamplifier 214 are close to the vicinity of the convergence potential,and shift to a convergence process described in a linear model. In thecase where the current-output type buffer 215 and the subtracting means212 are realized on the same IC chip, since the convergence time isadvantageously reduced as the maximum output current is larger, the ICchip is designed such that the buffer 215 and the means 212 have thesame value within the practical range which can be realized on the ICchip. Further, at this time, the convergence time is advantageouslyreduced in the case where a slewing rate of a circuit comprising thefilter 213 and the subtracting means 212 and a slewing rate of a circuitcomprising the filter 216 and the current-output type buffer 215 are thesame. Therefore, nearly equal values are employed for the capacitors C1and C3. Here, in the case of the secondary filter 213 having lag-leadcharacteristics comprising the capacitors C2 and C3 and the resistor R3as shown in FIG. 2, since the value of the capacitor C3 becomesordinarily about one digit larger than that of the capacitor C2, thecapacity value of the filter 213 can be represented by the capacitor C3.

FIG. 3 shows the characteristics of the transfer functions F1 and F2 ofthe filter 213 and the filter 216 when C1 and C3 each have the samevalue and when the loop band is set at 1.8 MHz. From FIG. 3, it is foundthat, in the high frequency area, F2 has smaller gain. Therefore, anoise suppressed degree is increased when F2 is included rather than theF1 is in the numerator of the transfer function HN4 of formula 8. Inother words, with respect to the arrangements of F1 and F2, arrangement1 according to this embodiment is more appreciate than arrangement 2described above in terms of the noise suppression characteristicsthereof.

Further, the transmitter according to the present embodiment functionseffectively even in the case of the operating mode in which the GMSKmodulation is performed. In other words, since the modulated signal MODhaving a constant amplitude is supplied from the quadrature modulator120 in the GSM mode, the output voltage of the power amplifier 200 canbe also controlled by keeping the amplitude loop in the operating stateand by getting the gain of the automatic gain controlled amplifier 206changed according to the output request level. For example, in the casewhere it is desired to increase the output voltage of the poweramplifier 200, by making smaller the gain of the automatic gaincontrolled amplifier 206, the amplitude detector 230 determines that theoutput amplitude is small, and thereby the control voltage VAPC forincreasing the output voltage is applied to the output control terminalof the power amplifier 200 via the amplitude loop, so that the outputvoltage is made larger. On the contrary, if the gain of the automaticgain controlled amplifier 206 is made larger, then the amplitudedetector 230 determines that the output amplitude is large and therebythe control voltage VAPC for lowering the output voltage is applied tothe output control terminal of the power amplifier 200 so that theoutput voltage is made smaller.

Next, a second embodiment of the transmitter according to the presentinvention will be described.

FIG. 4 is a configuration diagram showing the second embodiment of thetransmitter according to the present invention. The transmitteraccording to the present embodiment employs a configuration in which thelimiters 208 and 210 commonly utilized in the amplitude loop and thephase loop in the first embodiment are used for the amplitude loop andin which limiters 300 and 301 are added for the phase loop, such thateach loop has the limiters. According to the present embodiment, it isadvantageous that the respective characteristics of the limiters can beoptimized for each loop.

Next, a third embodiment of the transmitter according to the presentinvention will be described.

FIG. 5 is a configuration diagram showing the third embodiment of thetransmitter according to the present invention. In the secondembodiment, the transmitter according to the present embodiment has aconfiguration in which second signal branching means 403 is inserted inthe front stage of the power amplifier 200, that is, inserted betweenthe transmission VCO 220 and the power amplifier 200; and a secondattenuator 402 for attenuating the output of the signal branching means403, a second mixer 400, and a filter 401 are provided; and the outputof this filter 401 is fed back to the phase detector 218 via the limiter300, so that the phase loop is configured separately from the amplitudeloop. The local signal supplied to the second mixer 400 is in commonused as the local signal to the mixer 203, and is supplied from thelocal VCO 204. The output signal of the mixer 400, whose undesiredharmonics are suppressed in the filter 401, is supplied to the limiter300.

Further, in the transmitter according to the present embodiment, theamplitude loop, namely, the mixer 203, the automatic gain controlledamplifiers 206 and 214, the current-output type mixers 209 and 211, thesubtracting means 212, the current-output type buffer 215, and thebuffer 217 are kept in non-operating states, only the phase loop isenabled to operate, and a predetermined fixed voltage corresponding tothe output request level is applied to the output control terminal ofthe power amplifier 200, and thereby the transmitter is operated as asystem similar to the aforementioned offset PLL architecture and canmake the transmission of the GMSK modulation performed. Here, in orderto apply the predetermined fixed voltage corresponding to the outputrequest level to the output control terminal of the power amplifier 200,a configuration may be employed in which, for example, a changeoverswitch is provided between the buffer 217 and the output controlterminal of the power amplifier 200 so that, for example, the controlvoltage VAPC supplied from the base band circuit 300 in place of theoutput of the buffer 217 is directly applied thereto.

Next, an example, in which the second embodiment is applied to atransmitter for dual band and a wireless communication apparatus isconfigured by using the transmitter, will be described with reference toFIG. 6.

Here, as an example, the EDGE system for the dual bands of GSM900 andDCS1800 will be described. In the example shown in FIG. 6, though notparticularly limited, a direct conversion architecture for directlyconverting a RF signal into a base band signal is employed in areceiving system circuit, and the second embodiment to which thepolar-loop architecture is applied is employed in a transmitting systemcircuit.

The receiving system circuit is configured by RF filters 519 a and 519 bfor passing through a desired reception band, low noise amplifiers 513 aand 513 b, mixers 514 a, 514 b, 514 c and 514 d, and an automatic gaincontrolled low pass filter 522. The RF filter 519 a, the low noiseamplifier 513 a, and the mixers 514 a and 514 b are used for GSM900while the RF filter 519 b, the low noise amplifier 513 b, and the mixers514 c and 514 d are used for DCS1800. In the mixers 514 a, 514 b, 514 cand 514 d, the reception signal is frequency converted from the RF bandto the base band, and, at the same time, a demodulation for separatingthe reception signal into a cosine component (I) and a sine component(Q) is also performed. Therefore, it is necessary that different localsignals having a 90 degrees phase shift from each other are added to themixers 514 a and 514 b, and, in this example, the local signals aregenerated by using the frequency divider 515 a. Different local signalshaving a 90 degrees phase shift from each other are generated in thefrequency divider 515 b and are supplied also to the mixers 514 c and514 din a similar manner. The local signals are generated by anoscillator 512.

The oscillator 512 can oscillate within the range of at least 3580 MHzto 3980 MHz. In GSM900 mode, the oscillator 512 oscillates within therange of 3700 MHz to 3840 MHz, and the signal oscillated from theoscillator 512 is frequency-divided in 1850 MHz to 1920 MHz by thefrequency divider 511 and then is frequency-divided in 925 MHz to 960MHz by the frequency divider 515 a, so that the reception band of GSM900is all covered. Further, in DCS1800 mode, the oscillator 512 oscillateswithin the range of 3610 MHz to 3760 MHz, and the signal oscillated fromthe oscillator 512 is frequency-divided in 1805 MHz to 1880 MHz by thefrequency divider 515 b, so that the reception band of DCS1800 is allcovered. The base band signals demodulated in the mixers 514 a, 514 b,514 c and 514 d are input into the automatic gain controlled low passfilter 522 in which a level adjustment and a disturbance wave removalare performed. The automatic gain controlled low pass filter 522 isconfigured by the low pass filters 516 a, 516 b, 518 a and 518 b, andautomatic gain controlled amplifiers AGC 517 a and 517 b.

The transmitting system circuit 523 is a circuit in which the secondembodiment is configured as a transmitter for dual band. In order torealize the transmitter for dual band, a dual band oscillator 500capable of oscillating in two bands of GSM900 band and DCS1800 band isemployed in place of the transmission oscillator 220 shown in FIG. 1,and a dual band nonlinear power amplifier 501 for two bands of GSM900band and DCS1800 band is employed in place of the nonlinear poweramplifier 200 shown in FIG. 1. The dual band nonlinear power amplifier501 has a first output terminal and a second output terminal, in which asignal is output from the first output terminal at GSM900 and a signalis output from the second output terminal at DCS1800.

Signal branching means 201 a and 201 b are connected to the first andsecond output terminals of the dual capable nonlinear power amplifier501, respectively. The signal being input into the signal branchingmeans 201 a is branched into two, wherein one is supplied to a low passfilter 507 a for suppressing undesired harmonics, and the other is inputinto the attenuator 202 a. With respect to the signal input into thesignal branching means 201 b, one of the branched signals is supplied tothe low pass filter 507 b, and the other is input into the attenuator202 b. The output signals of the attenuators 202 a and 202 b are bothinput into the mixer 203.

The modulated signal MOD in this embodiment is generated by a quadraturemodulator 502. In the quadrature modulator 502, the modulation by the Iand Q signals is performed relative to the 80 MHz local signals having a90 degrees phase shift from each other. The local signals are generatedby using an oscillator 506 oscillating at 640 MHz and using thefrequency dividers 503, 504 and 505.

In order to reduce the number of oscillators, the oscillator 512 is incommon used for the transmitting system and the receiving system. AtGSM900, the oscillator 512 oscillates within the range of 3840 MHz to3980 MHz, and the output of the frequency divider 510 is in 1920 MHz to1990 MHz, and the output of the frequency divider 509 is in 960 MHz to995 MHz, and both outputs are used as the local signals of the mixer203. At DCS1800, the oscillator 512 oscillates in the range of 3580 MHzto 3730 MHz, the output of the frequency divider 510 is within 1790 MHzto 1865 MHz, and the output is used as the local signal of the mixer203. The change as to which one of the output signal of the frequencydivider 509 and the output signal of the frequency divider 510 is usedas the input signal of the mixer 203 is performed by switching means 508which is controlled by the control signal from the base band circuit.

The inputs of the RF filters 519 a and 519 b and the outputs of the lowpass filters 507 a and 507 b are switched by the switching means 520 forswitching the respective connections between the antenna 521 and them.For example, at GSM900 transmission, the antenna 521 and the low passfilter 507 a are connected with each other. Further, at GSM900reception, the antenna 521 and the RF filter 519 a are connected witheach other.

As described above, the invention made by the present inventor orinventors has been specifically described on the basis of theembodiments, but the present invention is not limited to theabove-mentioned embodiments and, needless to say, can be variouslychanged and modified without departing from the spirit thereof. Forexample, in the above embodiments, the filter with lag-leadcharacteristics having the capacitors C2 and C3 and the resistor R3 isemployed as the first filter 213 on the forward path of the amplitudeloop, but a filter may be used to which a resistor and a capacitor areconnected in order to improve a little more the noise suppressed degreewithin such a range that the lag-lead characteristic of the first filter213 are not largely changed.

As described above, the case has been described in which the presentinvention is applied to the system of dual band architecture capable ofthe communication according to two architectures of GSM architecture andDCS1800 architecture. However, in a system of triple band architecturewhich is configured such that the communication according to a PCS(Personal Communication System) 1900 architecture can be performed inaddition to either the GSM architecture or the DCS architecture, orboth, the present invention can be used even in the case where thecommunication depending on the phase modulation according to the 8-PSKmodulation mode can be performed in addition to the GMSK modulationmode. 850 MHz (US band) can also be used.

1. A transmitter comprising: a phase control loop for controlling aphase of a carrier being output from a transmission oscillator; and anamplitude control loop for controlling an amplitude of a transmissionbeing output signal output from a power amplifier, wherein a filterprovided on said amplitude control loop for restricting a frequency bandof said amplitude control loop is configured by a first 2^(nd)-orderpassive filter including a capacitor and a resistor and a second passivefilter including only a capacitor, and active current-output circuitsare provided at respective front stages of said first 2^(nd)-orderpassive filter and said second passive filter to isolate the transferfunctions of said first 2^(nd)-order passive filter and said secondpassive filter.
 2. A transmitter comprising: a transmission oscillatorfor generating a carrier; a power amplifier for amplifying a generatedcarrier signal; a phase control loop which includes a phase detector forcomparing a reference signal and a feedback signal and for outputting asignal corresponding to a phase difference thereof, and which controls aphase of the carrier being output from said transmission oscillator; andan amplitude control loop which includes an amplitude detector forcomparing a reference signal and a feedback signal and for outputting asignal corresponding to an amplitude difference thereof, and whichcontrols an amplitude of a transmission being output signal output fromsaid power amplifier, wherein a filter provided on said amplitudecontrol loop for restricting a frequency band of said amplitude controlloop is configured by a first 2^(nd)-order passive filter with lag-leadcharacteristics and a second passive filter of a perfect integrator, andactive current-output circuits are provided at respective front stagesof said first 2^(nd)-order passive filter and said second passive filterto isolate the transfer functions of said first 2^(nd)-order passivefilter and said second passive filter.
 3. The transmitter according toclaim 1, wherein in a first operating mode a phase and amplitudemodulation by said phase control loop and said amplitude control loop isperformed to transmit a signal; in a second operating mode a phasemodulation by said phase control loop is performed to transmit a signal;and in said first operating mode and said second operating mode saidphase control loop is in common used to perform a phase modulation. 4.The transmitter according to claim 3, wherein said first 2^(nd) orderpassive filter is provided at a front stage thereof prior to said secondpassive filter.
 5. The transmitter according to claim 4, wherein saidactive current-output circuit provided at a front stage of said secondpassive filter is designed to configure a perfect integrator circuitcomprising said active current-output circuit, said second passivefilter, and a circuit provided at a rear stage of said second passivefilter.
 6. The transmitter according to claim 1, wherein a firstautomatic gain controlled amplifier is provided on a feedback path fromsaid power amplifier to an amplitude detector in said amplitude controlloop; a second automatic gain controlled amplifier is provided on aforward path from said amplitude detector to said power amplifier insaid amplitude control loop; and gains of said first and secondautomatic gain controlled amplifiers are controlled such that a productof the gain of said first automatic gain controlled amplifier and saidgain of the second automatic gain controlled amplifier are keptapproximately constant.
 7. The transmitter according to claim 1, whereina bias is given such that said power amplifier is operated in anonlinear area in both of first and second operating modes.
 8. Thetransmitter according to claim 1, wherein said power amplifier isconfigured by a field effect transistor, and a voltage generated in saidamplitude control loop is applied to one of a drain and a source of saidfield effect transistor to control a gain of said transistor.
 9. Awireless communication apparatus comprising the transmitter according toclaim 1, a base band circuit for generating a base band signal on thebasis of transmission data, and a modulator for performing a phasemodulation and an amplitude modulation in accordance with a base bandsignal generated in said base band circuit.
 10. The wirelesscommunication apparatus according to claim 9, wherein a signal forcontrolling a gain of a first automatic gain controlled amplifier and again of a second automatic gain controlled amplifier is generated insaid base band circuit.